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"Virtual models suffer from inaccuracy whilst FPGA suffers from poor debug"

Is this a statement you agree with? I've been using Altium Designer for a while. There are vast arrays of things that can be done to debug on an FPGA. I run CPUs inside which I can step line by line and view variables and memory. I can run virtual instruments and collect data with soft logic analyzers, use frequency counters, all sorts of things to aid in debug. Can you clarify what you mean by poor debug?

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